Binary Adder/Subtractor provides you with a demonstration of how a four-bit adder / subtractor works.
Binary Adder/Subtractor enables you to understand the way an existing adder is re-used for replacing a subtraction operation, without having to create a new circuit.
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Binary Adder/Subtractor is a binary adder that provides the sum and the difference of two four-bit values, and is implemented in accordance with the IEEE 8-bit standard for Adder/Subtractor.
The circuit utilizes the 7-bit carry-save adder format. The binary adder has been adjusted to produce the eight-bit sum and difference in the default output format. The binary adder provides two output formats: one for the sum and one for the difference. These two outputs can be used as inputs to a MUX-16 circuit, which selects one of the two outputs as the final eight-bit output. The overall circuit can be described as:
!b A2[0..7] (b5) B0[0..7] C0[0..7] D0[0..7] (f2) B1[0..7] C1[0..7] D1[0..7] (f3)
Figure 1: Binary Adder/Subtractor circuit diagram
How the circuit works:
The inputs A2[0..7], B0[0..7], C0[0..7], and D0[0..7] are the four bit binary inputs to the circuit. The input is provided to the upper and lower bits of the seven-bit addition and subtraction circuits respectively.
The inputs A2[0..7] are four-bit binary input representing the sum of input pairs (A0+A1, A2), (B0+B1, B2), (C0+C1, C2) and (D0+D1, D2). Input B0 and C0 provide the carry bit, as will be explained later.
The carry input from the B- and C- inputs are passed through the OR gate (f3) and an AND gate (f2), which provides the carry-in to the D- and F- inputs.
The upper 7-bit addition and subtraction circuits (A1, A0, B1, B0, C1 and C0) are the same as a 7-bit carry-save adder, where a carry-out bit is produced from a 1-bit carry-in. The circuit for the lower 7-bit addition and subtraction (D1, D0, F1, F0, E1 and E0) is similar to the upper 7-bit adder and subtractor, but a carry-in bit is produced from the 1-bit carry-out from the upper adder. The bottom three inputs (D0, F0 and E0) are always 1.
When a 2-bit subtract is performed, B0 and C0 are always 1 for the subtraction. Therefore, the lower 7-
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